RICH Electronics

Signals from the cathode pads are processed by a readout element containing a preamplifier and shaper based on this conceptual diagram:


The analog processors, developed by IDE AS, Norway, have the following features:

  • low noise analog readout with an equivalent noise charge lower than 200 electrons for input capacitance smaller or equal to 10 pF.
  • input protection against sparking.
  • high dynamic range: the readout chain has linear response for input charge up to +/-500,000 electron input charge.
  • programmable peaking time in the range of 1 to 3 microseconds.
  • 64 processing channel/chip featuring both serial output with a differential buffer connected sequentially to each readout channel and parallel output with baseline subtraction, which allows digitization at the front end level with a chip ADC combined with this device.

HEP Architecture

The fine segmentation of the cathode pad readout requires the implementation with microelectronics technology (VLSI chip). We have a total of approximately 230,000 readout channels divided into 30 detector sectors. Each sector is subdivided into 12 readout segments connected via ribbon cable to the data boards located in front end crates. 

The VA_RICH chip mounted on a hybrid board:

The VA_RICH chip mounted on a hybrid board.

Electronic system development:

Woman smiling in front of computers.

For more information on analog issues associated with VA_RICH readout click here.
For more information on DAQ group effort on RICH DATABOARD click here.